The semiconductor industry is becoming highly specialized in the design of semiconductor devices. Customers are designing specific applications for integrated circuits such as, for example, for sensing temperature and fuel flow in an automobile to improve fuel economy. Typically, these application specific integrated circuits (ASIC) are complex to manufacture and therefore expensive in small volumes.
A common method of fabricating integrated circuit devices requires the use of a mask or reticle to photo-optically transfer a pattern of a structure to a semiconductor wafer. The structure is formed by patterning a layer of photoresist on the semiconductor surface which is then etched to form the structure. An example of a photo-optical device used to transfer the reticle pattern to a semiconductor wafer is commonly termed a stepper, after the step-and-repeat exposure process utilized.
Under present manufacturing techniques, the pattern for a specific integrated circuit is copied onto a computerized master tape. The master tape is then used to create a set of reticles for the lithographic process. A set of reticles is typically created with a complex, extremely expensive piece of equipment known as an Electron Beam Vertical Generator. A set of reticles must be created due to the various levels of structures on semiconductor devices, each of which requires at least one separate reticle. Reticles cost several thousand dollars, so if there are, for example, fifteen layers on a particular design, the cost for reticles alone can be very expensive, and the time to fabricate and inspect them can be lengthy.
After the reticles are created, they are sent to a fabrication area which uses a device such as the stepper to create the specific integrated circuit level by level. A reticle is placed into the Stepper and a photoresist coated wafer is exposed to a light source through the reticle. The exposure process then permits the subsequent development of the photoresist to form the desired pattern therein. The slice is then etched to produce a structure corresponding to the pattern.
After each structure is etched, an operator usually inspects the slice for deficiencies. If a deficiency is discovered, the entire slice may be lost, the reticle must be replaced and the entire process started over. Thus, if an error is not detected until the final layer, the fabrication expense which has incurred is wasted.
This process is both expensive and time consuming. The turn-around time for the creation of a master set of reticles and the fabrication of specific integrated circuits may be from weeks to months. The total cost for creating a specific integrated circuit is thus a barrier to many potential users.
Thus, there is a need for a method and apparatus for the fabrication of specific integrated circuits at a lower cost with a shorter turn-around time.